![]() ![]() ![]() ![]() For this, we have created an open-source tool called, Hashigo, that converts ladder logic to synthesizable Verilog. To evaluate this, however, the first step is to build a tool that converts ladder logic to a format mappable to FPGAs. The reason for this shift in technology is FPGAs are by nature parallel, programmable (reconfigurable), low cost, and have a high pin capacity, which makes them excellent substitutes for PLCs. This system solution works, but PLCs are expensive and cannot support all design implementations, and our work begins to support a community examination to replace the control computation resources with FPGAs. ![]() The resulting system needs to control machines in the millisecond time domain, and therefore, PLCs can implement what appears to be millisecond parallel control by emulating the logic with GHz processing capabilities of modern processors. Typically, these devices are programmed in ladder logic, which is used to define the logical control of connected machines in parallel. Programmable Logic Controllers (PLCs) are used in many industrial settings to control and automate machinery in a manufacturing process. ![]()
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